We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 57191

Xilinx HSSIO Solution Center - Design Assistant Serial Transceiver Electrical Simulation and Models


Xilinx provides IBIS-AMI and HSPICE models for electrical simulation of the input circuits

Note: This answer record is part of the Xilinx HSSIO Solution Center (Xilinx Answer 37181). The Xilinx HSSIO Solution Center is available to address all questions related to HSSIO. 

Whether you are starting a new design or troubleshooting a problem, use the HSSIO Solution Center to guide you to the right information.



  • Analog simulation of the channel is necessary to predict its functionality/signal integrity.
  • This simulation should include TX driver, channel and RX until the sampling FF.
  • RX and TX parts will be analog models - HSPICE or IBIS-AMI (algorithmic model interface).


    • extracted transistor netlist of the relevant circuits
    • very high accuracy
    • slow simulation
    • behavioral representation (algorithmic model), correlated to HSPICE or hardware, does n t gives away internal details
    • accuracy medium to high
    • fast simulation - more iterations possible
    • UltraScale Models are 64 bit. Previous models are 32 bit but simulators support mixed model simulations. See (Xilinx Answer 46083)
  • Model availability
    • To download devide models go to: 7-Series Models or UltraScale Models.
      You will have to register for access which is usually granted within a couple of hours.
    • HSPICE models are only available up to 6 series FPGAs
    • IBIS-AMI models are available since Virtex-5 FPGA


AR# 57191
Date 10/20/2015
Status Active
Type Solution Center
  • Artix-7
  • Virtex-6
  • Virtex-7
  • More
  • Virtex-5
  • Kintex-7
  • Kintex UltraScale
  • Virtex UltraScale
  • Less
Page Bookmarked