In the 7 Series FPGAs Configuration User Guide v1.7 (UG470) under SEU Correction, it says the following:
"If the POST_CRC_ACTION is set to CorrectAndContinue, then the readback logic starts over from the first address. If the CorrectAndHalt option is set, the readback logic stops after correction."
When I open an implemented design and run: set_property POST_CRC_ACTION CorrectAndContinue [current_design], the following message occurs:
ERROR: [Netlist 29-37] Cannot set property 'POST_CRC_ACTION'
How can I solve this issue?
The user guide is not showing the correct syntax for these settings.
You can run the list_property_value command to know the available value for the property POST_CRC_ACTION.
list_property_value POST_CRC_ACTION [current_design]
HALT CONTINUE CORRECT_AND_CONTINUE CORRECT_AND_HALT
The correct commands should be:
set_property POST_CRC_ACTION CORRECT_AND_CONTINUE [current_design]
get_property POST_CRC_ACTION [current_design]