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AR# 57984

Does Vivado Synthesis support the $clog2 function?


Vivado Synthesis does not seem to support the Verilog-2005 $clog2 function as part of Verilog 2001 support, but does support it as part of the System Verilog support.


The tool has support for Verilog 2001 and System Verilog; this function is supported as part of the System Verilog feature support in the tool.

To get this function working, the -sv switch can be used on the Verilog file. For example, read_verilog -sv test.v.

For now, there are no plans to expand support for this in Verilog 2001, but instead the recommendation is to use System Verilog.

Going forward, System Verilog will become the default setting for language for Vivado Synthesis.

AR# 57984
Date 12/11/2013
Status Active
Type Known Issues
  • Vivado Design Suite