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AR# 58038

Vivado IP Packager - Type REAL generic gets converted to SIGNED generic resulting in "ERROR: [IP_Flow 19-3285] Failed to convert float value 'x.xx' to HDL value."

Description

When packaging a design with a REAL type generic / parameter in IP Packager, the parameter gets converted to SIGNED type.  This results in the following error when generating output products:

ERROR: [IP_Flow 19-3285] Failed to convert float value '<value>' to HDL value.

For example: 

The packaged VHDL design contains a VHDL generic 'real' type data as follows:

    generic (
            my_real  : real := 1.5;
                    );

When generating this packaged IP, Vivado issues the following errors:

# create_ip -name my_IP -version 1.0 -vendor xilinx.com -library user -module_name my_IP
# generate_target {all} [get_ips my_IP]
Generating IP 'my_IP'...
Delivering 'VHDL Instantiation Template' file for IP 'my_IP'.
Generating IP 'my_IP'...
Delivering 'VHDL Synthesis' files for IP 'my_IP'.
ERROR: [IP_Flow 19-3286] Unsupported VHDL data type 'SIGNED' for float value.
ERROR: [IP_Flow 19-3285] Failed to convert float value '1.5' to HDL value.
ERROR: [IP_Flow 19-3286] Unsupported VHDL data type 'SIGNED' for float value.
ERROR: [IP_Flow 19-3285] Failed to convert float value '1.5' to HDL value.
ERROR: [Common 17-39] 'generate_target' failed due to earlier errors.

    while executing
"generate_target {all} [get_ips my_IP]"
    (file "ip.tcl" line 6)
INFO: [Common 17-206] Exiting Vivado at Fri May  3 11:23:04 2013...

Solution

REAL type Generics are not supported in Vivado IP Packager. A request to add support for them has been logged, but it has not yet been scheduled.

To work around this issue, use integer data types as generic parameters when packaging IP.

AR# 58038
Date Created 10/18/2013
Last Updated 10/07/2016
Status Active
Type General Article
Tools
  • Vivado Design Suite