It has been observed on a small number of ZC706 Rev 1.2 boards (assembly numbers 0431800-01 through 0431800-03, identifiable by a sticker on the underside of the board) that there is a spurious SRST_B signal being generated by U30 (Digilent JTAG SMT2 module) while the Zynq BOOT ROM is executing.
According to the Zynq-7000 All Programmable SoC Technical Reference Manual (UG585), the Zynq device will go into secure-lockdown if the BOOT ROM is executing when a SRST_B event occurs.
When the secure lockdown occurs, JTAG communication with the Zynq device is disabled.
This results in the JTAG chain not being recognized.
How can this issue be resolved?
If the JTAG chain is not recognized, pushing SW2 (Power-On Reset button on the ZC706) after initial power-up of the board can be used as an interim fix.
The board can be reworked to change the capacitance related to the POR_B signal.
This change in capacitance can extend the POR_B delay by an additional ~10 ms.
This added delay extends the POR_B beyond the spurious JTAG-SMT2 generated SRST_B signal, thus preventing the secure lockdown scenario from occurring.
This fix involves replacing capacitor C6 with a 5600 pF capacitor.
C6 is located on the underside of ZC706 Rev 1.2 PCB:
Example fix: (may use a capacitor with similar specifications):
Description: Ceramic capacitor, 5600 pF, 16V, 10%, X7R, 0402 package
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