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AR# 58205

2013.3 - Exporting to SDK using Project-less Flow from Vivado tool


Is exporting to SDK using a project-less flow supported in Vivado Design Suite 2013.3?


This feature is currently not supported in 2013.3. The SDK tool uses the Program FPGA GUI to initialize the bitstream block RAM. The Program FPGA uses the Bit and the back-annotated BMM file that is created when the user exported to SDK from the Vivado tool.

So, in project-less flow, you must provide these files manually. The BIT file can be obtained using the write_bitstream command, and the back-annotated BMM file can be created using the write_bmm command after bitstream is generated. To replicate the process run in Program FPGA, you can use data2mem. For help using the data2mem in the Vivado command line, run the command data2mem -help. There is also an example shown below:

data2mem -bm design_1_wrapper_bd.bmm -bt design_1_wrapper.bit bd mb_bootloop_le.elf tag design_1_i_microblaze_0 -o b download.bit
AR# 58205
Date 11/06/2013
Status Archive
Type General Article
  • Vivado Design Suite - 2013.3
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