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AR# 58230

Vivado Implementation - ERROR: [Place 30-659] Failed to constrain global clocks sharing the same clock spine.

Description

The Placer fails in placing global clocks for a GTX example design.

The error message received is:

ERROR: [Place 30-659] Failed to constrain global clocks sharing the same clock spine. Based on the placement location of the global clock buffer gtwizard_0_support_i/gt_usrclk_source/txoutclk_mmcm0_i/clkout1_buf, instance gtwizard_0_support_i/gtwizard_0_init_i/inst/gtwizard_0_i/gt2_gtwizard_0_i/gtxe2_i needs to be constrained to SLR(s) 0; however, this instance already belongs to an area constraint group, which does not intersect with the SLR constraint.
Resolution: Please modify the placement constraint on the global clock buffer or the area constraint on the instance that is driven by the global clock or both.
Phase 1.10 Constrain Clocks/Macros | Checksum: 133b50fe0

Time (s): cpu = 00:04:38 ; elapsed = 00:05:20 . Memory (MB): peak = 1652.633 ; gain = 63.742
Phase 1 Placer Initialization | Checksum: 133b50fe0
Time (s): cpu = 00:04:38 ; elapsed = 00:05:20 . Memory (MB): peak = 1652.633 ; gain = 63.742
ERROR: [Place 30-99] Placer failed with error: 'Global clock constraining failed.'

Solution

This error has occurred because there are 74 BUFG's in the design which is beyond the device capacity, making placement infeasible.

AR# 58230
Date Created 10/31/2013
Last Updated 03/25/2015
Status Active
Type General Article
Tools
  • Vivado Design Suite - 2013.1
  • Vivado Design Suite - 2013.2
  • Vivado Design Suite - 2013.3
  • Vivado Design Suite