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AR# 58387

PetaLinux 2013.04 - Can I boot Linux on a system with only PL-based DDR?


My system requires me to use only PL-based DDR (e.g., MIG). Can I boot Linux in such a system?


Yes, Linux can be booted on a such a system.

This answer record describes how to boot Linux on the ZC706 evaluation platform using PL-based DDR.

These instructions assume that Xilinx EDK 14.7 and PetaLinux 2013.04 are both properly installed and sourced.

1) Preparing the Hardware Platform

  1. The hardware platform begins as a standard XPS project based on the ZC706 template within XPS. To start, create an XPS project in the $PETALINUX/hardware/user-platforms/ area and import the ZC706 template.

  2. Once the template is imported, disable the Zynq PS DDR controller.

  3. Next, add the 7 series AXI DDR IP and clock generator IP to the project from the XPS IP Catalog.
    The DDR SO-DIMM available on ZC706 is the Micron MT8JTF12864HZ-1G6G and is available in the pre-set configurations. Using the default settings, the DDR peripheral should be connected at a base address of 0x40000000.
    See UG586 - 7 Series FPGAs Memory Interface Solutions for details on the required clock frequencies.


    In addition, ensure that any UCF constraints needed for clock or IO placement have been entered into the system.ucf constraints file. Once the design passes the XPS DRC checks (Project -> Design Rule Check), implement the hardware platform and export it to Xilinx SDK.

2) Preparing the FSBL and PetaLinux BSP

  1. Once exported to Xilinx SDK, follow the instructions found in the PetaLinux Board Bringup Guide (UG980) to add the PetaLinux repository and create the PetaLinux BSP application. Ensure that the main_memory hardware is mapped to the 7 series AXI DDR controller (example: axi_7series_ddrx_0) in the PetaLinux BSP project.

  2. Next, create a standard Zynq FSBL application within the SDK project. This application will be modified to use the PL-based DDR rather than the PS-based DDR. For users that want to only use OCM during FSBL runtime, please see (Xilinx Answer 56044).


    The following files should be modified in the FSBL project to switch the FSBL to use PL-based DDR:

    fsbl_debug.h - (optional) Add a #define FSBL_DEBUG_INFO at approximately line 75 (prior to the #define for DEBUG_GENERAL). This puts the FSBL into debug mode for additional information during boot. See the Zynq Software Developers Guide (UG821) for complete details

    main.c At approximately line 240 of main.c, near the beginning of main(), the PS7 is initialized. Since the PS-based DDR is unused and will cause the FSBL to enter into fallback mode. Simply comment out the call to FsblHookFallback() to prevent this behavior. In addition, the PS7_POST_CONFIG behavior needs to be modified. Comment out the call to ps7_post_config() and SlcrUnlock() inside FsblHandoff(). See the comments below for fsbl_hooks.c for more details.

    fsbl.h At approximately line 331, the DDR base address is defined with #ifdef XPAR_PS7_DDR_0_S_AXI_BASEADDR. Comment out this entire #ifdef-#endif block and manually #define DDR_START_ADDR and DDR_END_ADDR to the address of the PL DDR. This should be defined as XPAR_AXI_7SERIES_DDRX_0_S_AXI_BASEADDR and XPAR_AXI_7SERIES_DDRX_0_S_AXI_HIGHADDR in xparameters.h. This will ensure that the FSBL recognizes the PL DDR as the primary memory location.

    ps7_init.c The default behavior of ps7_init.c is to initialize PS-based DDR. At approximately line 8871 (search for "// DDR init"). Comment out the two lines appearing below the "DDR init" comment to prevent the initialization attempt for the PS DDR.

    image_mover.c The image mover code attempts to verify the load addresses as it parses the partitions found in the boot image. If this check fails, the code throws a INVALID_LOAD_ADDRESS_FAIL and then enters into FSBL fallback mode. Simply comment out the call to FsblFallback() for both the above DDR and below DDR check (approximately line 390).

    fsbl_hooks.c By default, the FSBL does not enable the PS-PL level shifters until right before the hand-off from the FSBL to the user application. Since this application needs to be able to utilize this interface before the hand-off, the FSBL hooks code should add the calls to ps7_post_config() and SlcrUnlock() from main.c into the FsblHookAfterBitstreamDownload(),

  3. After making all of these updates to the FSBL code, ensure that the FSBL compiles properly. Once the FSBL compiles properly, the design is ready to import into the PetaLinux tools.

3) Preparing the PetaLinux Platform

Follow the instructions found in UG980 PetaLinux Board Bringup Guide to create a new PetaLinux platform project and copy the configuration from the XPS/SDK project into the PetaLinux platform.

Note: to verify that Linux will use the proper hardware configuration, consult the generated Linux device tree at $PETALINUX/software/linux-2.6.x/arch/arm/boot/dts/<VENDOR>-<PLATFORM>.dts. The DTS node should be missing for the ps7_ddrc and one should be present for the axi_7series_ddrx controller.

4) Preparing the PetaLinux Software Configuration

If the target Linux kernel requires optimizations they can be created using petalinux-config-kernel. In addition, set the "Physical address of main memory" option to be the base address of the PL DDR controllers memory range. For this example, this is 0x40000000.

If the target system requires SMP operation, the U-BOOT source code also needs to be modified. Update $PETALINUX/software/petalinux-dist/u-boot/arch/arm/cpu/armv7/zynq/cpu.c. Comment out the following two lines:

/* remap DDR to zero, FILTERSTART */
writel(0, &scu_base->filter_start);
/* OCM_CFG, Mask out the ROM, map ram into upper addresses */
writel(0x1F, &slcr_base->ocm_cfg);

The first line that is commented out prevents U-BOOT from re-mapping DDR to address 0x00000000. The second line that is commented prevents U-BOOT from re-mapping OCM to a high address. This retains usable memory at location 0x00000000 which is required for Linux to bootstrap CPU1.

If SMP operation is not required, U-BOOT can remain unchanged but the Linux kernel must be started with the nosmp boot argument.

In addition, make any needed changes for the host software platform using the petalinux-config-apps tool. There are no specific changes needed in the application configuration menu to support PL DDR.

5) Building the PetaLinux Boot Images

Once the PetaLinux software configuration is finalized, build the PetaLinux platform by simply executing make from $PETALINUX/software/petalinux-dist. The output files will be placed in $PETALINUX/software/petalinux-dist/images. A Zynq boot image can be created using the petalinux-gen-zynq-boot command.

6) Booting the Design

Copy the BOOT.bin and image.ub files from the $PETALINUX/software/petalinux-dist/images directory to the boot device. In this example, boot from an SD card. Once U-BOOT is running, interrupt the boot process such that a U-BOOT prompt is displayed. To ensure that the Linux kernel is placed and booted from the PL DDR space (for proof of concept purposes), issue the following commands:

fatload mmc 0 0x41000000 image.ub
bootm 0x41000000

The Linux kernel will now boot into a live system.

Below is an example of the contents of the iomem node in a properly working system:

root@plddr:/proc# cat ./iomem
40000000-4fffffff : System RAM 40008000-404d3fff : Kernel code
40b20000-40b75447 : Kernel data e0001000-e0001ffe : xuartps e0002000-e0002fff : /amba@0/usb@e0002000 e0002000-e0002fff : e0002000.usb
e000a000-e000afff : e000a000.gpio
e000d000-e000dfff : e000d000.spi
e0100000-e0100fff : mmc0
f8003000-f8003fff : /amba@0/ps7-dma@f8003000 f8007000-f80070ff : xdevcfg
f8007100-f800711f : f8007100.xadc
AR# 58387
Date 01/29/2014
Status Active
Type General Article
  • SoC
  • Zynq-7000
  • EDK
  • EDK - 14
  • PetaLinux
  • PetaLinux - 2013.04
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