Xilinx has recently invested heavily in the AXI and AXI Stream interfaces, converting most core interfaces to one of these standards.
One of the main motivations for this is the ability to easily integrate individual IP into an overall system.
When integrating AXI Stream-based co-processors with the Zynq processing platform, the designer often needs to translate between the AXI domain and the AXI Stream domain.
For many cases, the AXI DMA core is the best solution.
This example shows how to use the AXI DMA core to create an FFT co-processor for Zynq.
Data originates in main system memory and is sent to the FFT core via the AXI DMA.
Once the FFT is done processing the data, it is sent back to main memory, also using the AXI DMA core.
The current version of this design was created in Vivado 2013.3.
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