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AR# 58582

Example Design - Zynq-based FFT co-processor using the AXI DMA


Attached to this Answer Record is an Example Design for a Zynq-based FFT co-processor using the AXI DMA.


This design demonstrates the usage of the AXI DMA core for creating custom Zynq co-processors.

Xilinx has recently invested heavily in the AXI and AXI Stream interfaces, converting most core interfaces to one of these standards.

One of the main motivations for this is the ability to easily integrate individual IP into an overall system.

When integrating AXI Stream-based co-processors with the Zynq processing platform, the designer often needs to translate between the AXI domain and the AXI Stream domain.

For many cases, the AXI DMA core is the best solution.

This example shows how to use the AXI DMA core to create an FFT co-processor for Zynq.

Data originates in main system memory and is sent to the FFT core via the AXI DMA.

Once the FFT is done processing the data, it is sent back to main memory, also using the AXI DMA core.

The current version of this design was created in Vivado 2013.3.


Associated Attachments

Name File Size File Type
dma_ex_fft_v2_0.zip 2 MB ZIP

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
57550 Example Designs - Designing with the AXI DMA core N/A N/A
AR# 58582
Date 08/28/2015
Status Active
Type General Article
  • Zynq-7000
  • Vivado Design Suite
  • Vivado Design Suite - 2013.3
  • AXI DMA Controller
  • AXI DMA Controller
Boards & Kits
  • Zynq-7000 All Programmable SoC ZC702 Evaluation Kit