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AR# 58587

Vivado 2013.3 IS_CLK_INVERTED is not included in libraries when compile_simlib is run


I am trying to simulate SRL16E with the generic parameter IS_CLK_INVERTED.

However, this parameter does not exist in the compiled library.


The issue is that the IS_CLK_INVERTED attribute is not yet supported by the tools.
This is why it is not included in any of the documentation and why it does not exist in the compiled library.
It is included in the SRL16E primitive as work towards a future feature when the next series of UltraScale boards are released.
AR# 58587
Date 09/23/2014
Status Active
Type General Article
  • Artix-7
  • Kintex-7
  • Virtex-7
  • Vivado Design Suite - 2013.3
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