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AR# 58763

System Management Wizard v1.0 - Known Issues for Vivado 2013.4


The System Management Wizard provides a complete solution for system monitoring of Xilinx UltraScale FPGAs.

This IP generates an HDL wrapper to configure SYSMONE1 primitive for user-specified external channels, internal sensor channels, various modes of operation, and alarms.

This IP supports monitoring of up to four user supplies.

This IP also configures various interfaces for accessing SYSMONE1 registers.


New Features

  • 10-bit 0.2 MSPS Analog to digital conversion
  • Access to 16 pairs of I/O pins as input channels
  • On-chip voltage and temperature sensing and conversion
  • User Supply monitoring of up to four banks/supply
  • Stand-alone measurement of system functionality including sequences and alarms
  • Optional AXI4-Lite interface based on AXI4 specification
  • Triple access (FPGA fabric/JTAG/I2C) DRP including control and status registers
  • Easy configuration of various modes and parameters
  • Simple interface for channel selection and configuration
  • Calculates all the parameters and register values

Known Issues

  • Routing issues for the I2C nets:
    SYSMON_AMS: Unroutable pin I2C_SCLK and I2C_SDA marked to be fixed for 2014.1.
    Work-around: Do not select the SYSMONE1 I2C option.
  • Timing failures due to tool issue:
    Scheduled to be fixed marked for 2014.1.
    Work-around: Do not select the AXI4-Lite interface.
  • Implementation error related to user supplies:
    Scheduled to be fixed in 2014.1.
    Work-around: Do not enable the User Supplies(VUSER<0-3>).
  • Issues with the SYSMONE1 setup
    Scheduled to be fixed in 2014.1
    Work-around: Use CONVST for the event timing mode.
AR# 58763
Date 02/10/2014
Status Archive
Type Release Notes
  • Kintex UltraScale
  • Virtex UltraScale
  • Vivado Design Suite - 2013.4
  • System Management Wizard
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