We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 59150

7 Series FPGA GTX/GTH Transceivers Wizard v3.1 - Tx Buffer Bypass does not complete successfully in auto mode


The GT example design from Wizard v3.1 with TX buffer bypass "auto" mode will not complete the TX reset FSM and simulate successfully.

In simulation, the TX auto phase alignment does not complete (TXDLYRESETDONE goes High, but TXPHALIGNDONE never goes High), the TX reset FSM times out, and simulation fails.


This issue is scheduled to be fixed in Vivado Design Suite 2014.1. In the meantime, use the buffer bypass manual mode as a work-around.
AR# 59150
Date 02/04/2014
Status Active
Type General Article
  • Kintex-7
  • Virtex-7
  • 7 Series FPGAs Transceivers Wizard
Page Bookmarked