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AR# 59286

2013.4 Vivado Implementation - Placement errors due to over utilization of BUFMRCE resources in a clock region

Description

A case has been seen where CORE Generator created four channels where four GTXE2_CHANNEL components each drove user clocks through a BUFMR/BUFR pair. Since all four GTXE2s were locked to a single clock region and BUFMRCEs must be placed in the same clock region, the design failed in clock placement because only two BUFMRCE sites are available per clock region. The failed placement had two BUFMRCEs placed in adjacent clock regions and the placement error was focused on this flaw in the placement. The root cause was over utilization of the BUFMRCE resources in the target clock region:

ERROR: [Place 30-137] Unroutable Placement! A GT / BUFR component pair is not placed in a routable site pair. The GT component can use the dedicated path between the GT and the BUFR if both are placed in the same clock region. If this sub optimal condition is acceptable for this design, you may use the CLOCK_DEDICATED_ROUTE constraint in the .xdc file to demote this message to a WARNING and allow your design to continue. However, the use of this override is highly discouraged as it may lead to very poor timing results. It is recommended that this error condition be corrected in the design. A list of all the CELL.NETs used in this clock placement rule is listed below. These examples can be used directly in the .xdc file to override this clock rule.
< set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets mac_pcs_pma_wrapper_top/mac_pcs_pma_wrapper/mac3/mac_pcs_pma/pcs_pma/core_wrapper/transceiver_inst/gtwizard_inst/GTWIZARD_i/gt0_GTWIZARD_i/gt0_rxoutclk_i] >

Solution

This problem was resolved by substituting BUFHCE clock buffers for the BUFMRCE/BUFR pairs which relieves the over utilization of BUFMRCEs.

A TCL script has been attached to this article that can be used to analyze the identity of the components driving all BUFMRCEs, and the clock regions occupied by the BUFMRCEs and the components driving them.

For the case above, the script provided the following information:

BUFMRCE #1 is placed in CLOCKREGION_X1Y4 and is driven by GTXE2_CHANNEL_X0Y19 in CLOCKREGION_X1Y4.

BUFMRCE #2 is placed in CLOCKREGION_X1Y5 and is driven by GTXE2_CHANNEL_X0Y18 in CLOCKREGION_X1Y4.

BUFMRCE #3 is placed in CLOCKREGION_X1Y4 and is driven by GTXE2_CHANNEL_X0Y17 in CLOCKREGION_X1Y4.

BUFMRCE #4 is placed in CLOCKREGION_X1Y3 and is driven by GTXE2_CHANNEL_X0Y16 in CLOCKREGION_X1Y4.

BUFMRCE #5 is placed in CLOCKREGION_X1Y2 and is driven by GTXE2_CHANNEL_X0Y11 in CLOCKREGION_X1Y2.

BUFMRCE #6 is placed in CLOCKREGION_X1Y1 and is driven by GTXE2_CHANNEL_X0Y10 in CLOCKREGION_X1Y2.

BUFMRCE #7 is placed in CLOCKREGION_X1Y2 and is driven by GTXE2_CHANNEL_X0Y9 in CLOCKREGION_X1Y2.

BUFMRCE #8 is placed in CLOCKREGION_X1Y1 and is driven by GTXE2_CHANNEL_X0Y8 in CLOCKREGION_X1Y2.

To run the script:

  1. Implement the design with all errors overridden with CLOCK_DEDICATED_ROUTE set to FALSE.
  2. From the TCL console, run "source ID_BUFMRCE_ClockRegion.tcl".

Attachments

Associated Attachments

Name File Size File Type
ID_BUFMRCE_ClockRegion.tcl 660 Bytes TCL
AR# 59286
Date Created 01/31/2014
Last Updated 02/10/2014
Status Active
Type General Article
Devices
  • Virtex-7
Tools
  • Vivado Design Suite - 2013.4