We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 59465

2013.4 Vivado Router - On a congested design the router finished with Hold violations


A case has been seen where on a congested design, the router finished with Hold violations ~100 small negative slack violations. The Hold router runs at the end of the routing phase after Setup timing has been optimized. The router fixes Hold errors by adding routing delay to the data path, so when it fails to fix Hold errors, it is usually because a route with the necessary delay to hit the window that satisfies both Setup and Hold is not available or not found. In this case, however, if a second pass of route_design was run, the design met timing.


A CR is under investigation an tentatively assigned to be fixed in Vivado Design Suite 2014.1.

Meanwhile, you can try running route_design a second time for cases where the first pass finishes with Hold violations.

AR# 59465
Date 02/18/2014
Status Active
Type General Article
  • Virtex-7
  • Vivado Design Suite - 2013.4
Page Bookmarked