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AR# 59473

Zynq-7000 AP SOC - Is there any caching when MMU is disabled for zynq?


Can the Zynq-7000 cache be used without the MMU being enabled/configured?


One of the functions of MMU is to designate (through the contents of the MMU Page Table) which areas of the memory space are suitable for caching (normal memory such as ROM, RAM or Flash) and which areas are not (peripheral devices).

Therefore caching of data access is only safe once the Page Tables have been configured and the MMU is enabled.

For access apart from Non-secure PL1(privilege level 1) and PL0 access, data access is non-cacheable, and instruction access can be cacheable depending on SCTLR.I and HSCTLR.I

For Non-secure PL1 and PL0 accesses, when HCR.DC is set to 0, it is the same as the above situation. 

When HCR.DC is set to 1, refer to section B3.2.1 of ARMV7-A Architecture Reference Manual(DDI0406C).



AR# 59473
Date 04/23/2014
Status Active
Type General Article
  • Zynq-7000