Version Found: MIG 7 Series v2.0 Rev 2
Version Resolved: See (Xilinx Answer 54025)
The MIG 7 Series VHDL instantiation template file (.VHO) is not generated correctly.
The syntax is not correct and is missing the component declaration.
To work around the issue, open the example design and view the instantiation of the MIG core in the example design for reference.
03/04/2014 - Initial release