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AR# 59625

MIG UltraScale - Design Methodology Checklist

Description

The MIG design checklist is a tool available to help customers through every stage of their MIG design.  

The checklist organizes information that is critical to successful MIG operation, especially at top supported data rates. 

It includes information on core definition and generation, pin, clock, and board planning, simulation, design flow, and hardware debug.  

There are many resources and available documentation on Xilinx.com useful in designing and debugging memory interfaces.  

Based on design flow, the spreadsheet organizes everything MIG users need to know and them points to the applicable documentation and/or resources.  

The checklist is provided as an Excel spreadsheet that is divided into sheets for each of the previously listed categories. 

Each line item details information users need to understand when working with MIG, where to go for more information, a check of whether the item has been reviewed, and notes should there be follow on questions or items to check at a later time.

Solution

Download the spreadsheet here and use throughout the definition, board layout, and design and debug of MIG UltraScale cores.  

Ensure that macros are enabled after opening the spreadsheet.

Revision History:

09/25/2014 Updated to include URL path to spreadsheet
06/04/2014 Updated for 2014.2 and added QDR and RLDRAM content
03/15/2014 Initial Release

 

Linked Answer Records

Master Answer Records

AR# 59625
Date Created 03/04/2014
Last Updated 11/11/2016
Status Active
Type General Article
Devices
  • Kintex UltraScale
  • Virtex UltraScale
IP
  • MIG UltraScale