We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 59631

2013.x - Vivado Timing - My CPR is negative. Is this incorrect?


In the Setup checks, Clock Pessimism Removal (CPR) typically moves the clock arrival at the destination forward in time. 

This gives more time for setup to be valid and is helpful.. 

A negative CPR on the other hand would make the clock arrival at the destination occur sooner, which gives less time for the setup to be valid.

Is this correct?


Negative CPR can occur when a Clock Modifying Block (CMB) is used which deskews the clock to the input pad.

For the path below, the clock path moves through a PLL.

The PLL adds negative delay which deskews the output clock to the input port.

This means that the minimum clocking path will have a larger negative delay when compared to the maximum path.

Effectively, the pre-CPR analysis reduced the maximum path by more delay than the minimum path, which makes the calculation too optimistic.

In this scenario, CPR will cause the clock arrival at the destination to occur sooner, which will account for this optimism.
The CPR is applied at the common node and compensates for the fact that the common path cannot be both a minimum value and a maximum value at the same time.
In the timing report below, the source (data path) and destination (clock path) common node are the same as the net which follows the BUFG.

AR# 59631
Date 08/22/2014
Status Active
Type General Article
  • FPGA Device Families
  • Vivado Design Suite