We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 59755

Virtex-7 FPGA VC709 Connectivity Kit - Changes made for rev 1.0


What changes were made to the Virtex-7 FPGA VC709 Connectivity Kit for rev 1.0?


The VC709 Evaluation Kit changes are as follows:

  • Footprint for clock U51 includes pin 1 indicator.
  • Added two 2 ounce copper power planes for layers 9 & 10.
  • Added "CE" mark slk to top side in FMC connector area.
  • Removed FMC_VADJ_ON_B J51 2-pin header R399 and R400.
       - level translator U32 pin 15 becomes NC (3.3V FMC_VADJ_ON_B from controller).
       - level translator U32 pin 6 becomes NC (1.8V FMC_VADJ_ON_B to FPGA).
       - FPGA U1 pin AH35 becomes NC.
  • Moved PWRCTL1_VCC4B_PG net from U42 pin 28 to U64 pin 28.
       - U42 pin 28 becomes NC.
  • Updated silkscreen revision to "1.0".

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
59754 Virtex-7 FPGA VC709 Connectivity Kit - PCB Revision Differences N/A N/A
AR# 59755
Date 05/12/2014
Status Active
Type General Article
Boards & Kits
  • Virtex-7 FPGA VC709 Connectivity Kit
Page Bookmarked