Description

This answer record provides a document that describes how to connect the Tri-Mode Ethernet and 1000BASE-X PCS/PMA or SGMII cores in Vivado 2013.2 in the top level TEMAC example design, targeting KC705 and VC707 boards specifically.

It also includes a simulation section on running BIST loopback and a Hardware debug section which covers using ILA debug cores in Vivado flow.

Solution

Often it is helpful to run simulation and use ChipScope to capture signals on different interfaces to debug Ethernet issues. 

The document attached with this answer record describes the steps to run the simulation with viewing signals on different interfaces and the steps to add an ILA core in Vivado for debugging of Ethernet issues.

The TEMAC is still set up to connect via MDIO to the Marvell PHY. 

The SGMII core was generated without an MDIO interface and it is configured via a configuration vector while the status is reported with a status vector.

There are 3 zip files attached.

• KC705.7z: - Can be run out of box in simulation (by slightly modifying to enable AN, you can also implement the design and run it on Hardware)
• KC705_ILA.xpr.zip -  An added ILA core in Vivado for HW debugging -> HW validated
• VC707.7z - HW validated but without an ILA core and with a ready_to_download bitstream

Attachments

Associated Attachments