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  4. AR# 60305: Memory Interface UltraScale DDR4/DDR3 - Hardware Debug Guide

AR# 60305

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Memory Interface UltraScale DDR4/DDR3 - Hardware Debug Guide

Description

Starting with Vivado 2015.3, the debug documentation is included within (PG150). Please reference the Debugging section for this content.

Solution

Please download (PG150) and refer to the Debugging section for this content.

 

Revision History:
  • 10/03/14 - Initial Release
  • 12/08/14 - 2014.4 Release
  • 04/30/15 - 2015.1 Release
  • 07/01/15 - 2015.2 Release
  • 11/05/15 - 2015.3 Release
  • 09/30/20 - Updated to remove obsolete information
AR# 60305
Date 10/20/2020
Status Active
Type General Article
Devices
IP
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