Can userclk and userclk2 be connected to different buffers?
For example, BUFG for userclk2 and BUFH for userclk.
userclk and userclk2 should not be connected to different buffers.
This applies to both TX and RX USERCLK's.
This is because userclk2 and userclk have the same phase requirement, as described in UG476:
"TX/RXUSRCLK and TX/RXUSRCLK2 must be positive-edge aligned, with as little skew as possible between them. As a result, low-skew clock resources (BUFGs and BUFRs)
should be used to drive TX/RXUSRCLK and TX/RXUSRCLK2."
The tested and approved configurations of the clocking are shown in the Users Guide.
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