AR# 60856

Vivado Implementation - ERROR: [Chipscope 16-119] Implementing debug core dbg_hub failed.

Description

"opt_design" can fail with error messages similar to the following:

opt_design failed
ERROR: [Chipscope 16-119] Implementing debug core dbg_hub failed.
ERROR: An unknown error has occurred while implementing debug cores in this design.

OR

ERROR: [IP_Flow 19-3805] Failed to generate and synthesize debug IP "xilinx.com:ip:xsdbm:1.0".
ERROR: [IP_Flow 19-167] Failed to deliver one or more file(s).
ERROR: [IP_Flow 19-3505] IP Generation error: Failed to generate IP 'dbg_hub_CV'. Failed to generate 'Verilog Synthesis' outputs: 
ERROR: [IP_Flow 19-98] Generation of the IP CORE failed.

ERROR: [Chipscope 16-119] Implementing debug core dbg_hub failed.
ERROR: Could not generate core for dbg_hub. Aborting IP Generation operation.
         ERROR: [Chipscope 16-218] An error occurred while trying to create or get a cached instance from the IP cache manager:
         "IP generation failed see log file in e:/jinhua/prj/sample/dvcs2_4k/prj_submit/dvcs2_4k_input_processor_fpga_app/dvcs2_4k_input_processor_fpga_app.runs/impl_1/.Xil/Vivado-164820-CNSH1AECPC040/dbg_hub_CV.0/out
ERROR: [IP_Flow 19-167] Failed to deliver one or more file(s).
ERROR: [IP_Flow 19-3505] IP Generation error: Failed to generate IP 'dbg_hub_CV'. Failed to generate 'Verilog Synthesis' outputs: 
ERROR: [IP_Flow 19-98] Generation of the IP CORE failed.

Solution

When generating the Debug Cores during Phase 1, the following messages are shown:

Phase 1 Generate And Synthesize Debug Cores
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2014.2/data/ip'.
INFO: [IP_Flow 19-3826] Re-using generated and synthesized IP, "xilinx.com:ip:labtools_xsdb_master_lib:3.0", from Vivado Debug IP cache, "C:/Projects//project_1/project_1.cache/2aa2f6b8".

The Debug Hub in cache is out-of-sync and needs to be cleared with the following command:

Vivado 2014.x:

update_ip_catalog -clear_ip_cache

Vivado 2015.1 and newer:

check_ip_cache -clear_output_repo

When this issue occurs on a Windows machine, the root cause is often a failed generation of the Debug Hub due to a path length issue.

Windows only supports 260 characters in a path.

The Debug Hub is generated in a temporary folder and can violate this path length limitation.

The recommendation is to reduce path length and regenerate the Debug Hub.

AR# 60856
Date 08/10/2016
Status Active
Type General Article
Tools
IP