A MIG 7 Series core can span a maximum of 3 consecutive banks (i.e. banks 9, 10, 11).
Even if this requirement is followed the following error message may be seen during Verify Pin Out in the MIG GUI:
ERROR : Memory interface signals should be selected in consecutive banks. Banks selected: 9, 11, 10. To bypass this error and proceed further for design generation, refer to AR #43481. INFO : Cannot verify further unless the existing errors are resolved.
This is an error in the verification algorithm and can be safely ignored.