We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome,
Internet Explorer 11,
Safari. Thank you!
Selecting Pin Compatible devices for an Artix automotive part may result in the following message and result in the MIG GUI locking up:
Parsing error in file ..../ac50tcsg324_pck.xml
This occurs as a result of different locations for the integrated PHY blocks even though FPGAs in the same package share the same pin names.
To work around this issue, manually build a separate MIG core for each of these devices and then use the "Verify Pin Changes and Update Design" feature to skip entering all of their configuration options into the GUI each time you build the core.