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AR# 61072

Vivado 2014.1 - Logic Debug - How to trigger two ILAs for different clock domains


I need to use two ILA cores in my project to trigger with different clocks.

How can I trigger two ILA cores at the same time?


You can use the Trigger In and Trigger Out port of an ILA core to cascade these two ILA cores.

Turn on the Trigger Out mode in the front ILA and set the trigger condition for this ILA.

Set the behind ILA to capture only when there is a trigger in event. 

You could also OR the trigger in signal with a condition on the counter if you needed to.

To start the capture, arm the behind ILA first, then arm the front ILA. When the condition is met both ILAs will be triggered.


AR# 61072
Date 12/03/2014
Status Active
Type General Article
  • Artix-7
  • Kintex-7
  • Virtex-7
  • Vivado Design Suite - 2014.1
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