When I use the command compile_simlib -simulator modelsim/ies/vcs_mx/questa in the Vivado TCL console to compile the Xilinx Simulation libraries, I receive the below error message:
ERROR: [Vivado 12-2156] Invalid library 'xilinxcorelib' specified for -library.
-library <library> : Specify the name of the library to be compiled. The valid libraries names are :-
unisim simprim axi_bfm
This does not seem to cause harm but compile_simlib ends with the message below:
compile_simlib tcltask - end ... (1)
compile_simlib: Time (s): cpu = 00:00:29 ; elapsed = 00:00:49 . Memory (MB): peak = 6074.457 ; gain = 0.000
ERROR: [Common 17-39] 'compile_simlib' failed due to earlier errors.
This is a known issue in Vivado Design Suite 2014.1 and has been fixed in the 2014.2 release.
You can safely ignore this error in 2014.1 as your libraries will be properly compiled in spite of this error.
Was this Answer Record helpful?