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AR# 61346

2014.2 Vivado Sysgen - Compilation fails for SLX and MDL files which include OPMODE block when using Matlab R2014a


My Sysgen MDL/SLX design contains an OPMODE block from the Xilinx Blockset.

However, the design does not generate when using Matlab R2014a.

After attaching the SLX/MDL file to a Vivado project as a source and then selecting "Generate Output Products" in the Vivado GUI, the following error message is reported in the Matlab console:

Error using xlGenerateForPA (line 35)
Failed to netlist model 'test_opmode.slx' (error code 4). Errors occurred during netlist generation.
'test_opmode/Opmode' has an invalid constant (inf) sample time. Discrete states, continuous states, and tunable parameters are not allowed with constant sample times.

The generation also appears to fail when run from a Sysgen Token but the error message is not displayed and it is not clear what has caused the error to occur.


This is a known issue in Matlab and cannot be resolved within the Vivado Sysgen environment.

To work around the issue:

1) Revert back to Matlab R2013b

2) If feasible use the CONSTANT block instead of the OPMODE block in your model. (See (Xilinx Answer 61951))

Linked Answer Records

Associated Answer Records

AR# 61346
Date 04/15/2015
Status Active
Type General Article
  • System Generator for DSP
  • Vivado Design Suite - 2014.2