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AR# 61387

Vivado Constraints - How can we initialize BRAM through XDC?


How can we initialize the Block RAM with data using XDC?


This is the procedure that should be followed to update the INIT values of the BRAM instance of your design:

1.    Run synthesis on the design.

2.    Open the synthesized design.

3.    Do a find of the BRAM instance. Use Edit -> Find -> PRIMITIVE_TYPE -> is -> BRAM.
       This will list out the BRAM instances in the design. Use the Find Results tab to select the BRAM instance.

4.    Type the following command in the tcl console to find the INIT values:
report_property all get_cells [cpuEngine/cpu_iwb_dat_o/buffer_fifo/infer_fifo.block_ram_performance.fifo_ram_reg]

 5.    Type the following command in the tcl console to update the INIT values.
set_property INIT_A 16`h5555 get_cells [cpuEngine/cpu_iwb_dat_o/buffer_fifo/infer_fifo.block_ram_performance.fifo_ram_reg]

6.    This will update the BRAM INIT_A attribute by 16h5555.
       This can be confirmed by running the same command in the tcl console again.
report_property all get_cells [cpuEngine/cpu_iwb_dat_o/buffer_fifo/infer_fifo.block_ram_performance.fifo_ram_reg]

AR# 61387
Date 01/13/2015
Status Active
Type General Article
  • FPGA Device Families
  • Vivado Design Suite - 2014.2