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AR# 61506

2014.2 Vivado Sysgen - Receiving ERROR: [Synth 8-1031] register_q_net is not declared when trying to generate a Synthesized Checkpoint


When trying to generate a Synthesized Checkpoint I receive the following error.

ERROR: [Synth 8-1031] register_q_net is not declared [F:/path_to_output_directory/Synthesized Checkpoint/module_1.srcs/sources_1/imports/sysgen/module_1.vhd:168]

This is occurring on a signal which is output from a subsystem and fed back into the subsystem as an input.

If I remove the subsystem from the design synthesis completes without issue.

Is this a known issue and how can I work around this error without removing my subsystem?


This is a known issue and a CR has been raised for this problem. It is currently under investigation to be fixed in a future release.

It is possible to work around this error in 2 ways:

a) Expand the subsystem to remove it from the design.


b) It is also possible to add a zero latency delay element to the feedback signal at the upper level instead of within the subsystem.

AR# 61506
Date 07/15/2014
Status Active
Type General Article
  • System Generator for DSP
  • Vivado Design Suite - 2014.2
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