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AR# 61627

MIG UltraScale RLDRAM3 - data mask does not work for RLDRAM3 designs


Version Found: v5.0 Rev1
Version Resolved: See (Xilinx Answer 58435)

Data mask does not currently work for MIG UltraScale RLDRAM3 designs because it is incorrectly tied to GND inside the IP.


In order for data mask to work properly the following HDL change is required:

Open rld3_default_0_mig.sv and modify line 487:

  • Old:
          .user_wr_dm                ({APP_MASK_WIDTH{1'b0}}),
  • New:
          .user_wr_dm                (c0_rld3_user_wr_dm), //({APP_MASK_WIDTH{1'b0}}),

Revision History:
07/25/2014 - Initial Release

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
58435 DDR4, DDR3, QDRIV, QDRII+, RLDRAM3, LPDDR3 UltraScale and UltraScale+ - IP Release Notes and Known Issues N/A N/A
AR# 61627
Date 07/28/2014
Status Active
Type Known Issues
  • Virtex UltraScale
  • Kintex UltraScale
  • MIG UltraScale
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