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1.5i: 9500XL: Hitop : BUFT and Clock polarity inverted
Keywords: 9500XL, polarity, inversion
General Description: A problem was detected on a few select cases
with designs showing inverted output from a clock signal or obuft.
Please refer to solution 6427 for the ftp site location of the patch to be
installed on top of 1.5i with Service Pack 2. (http://www.xilinx.com/techdocs/6427.htm)
For a temporary workaround you can place a keep attribute on the tristate
signal to prevent the polarity inversion.
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