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AR# 61903

Design Advisory for Virtex UltraScale ASCII Package Files Update

Description

This Design Advisory is being released as a notification that both the ASCII files available from xilinx.com prior to 8/19/2014 and pinout information available in Vivado up to and including version 2014.2 contain incorrect packaging details for the FFVC1517 package.




Solution

The following contained incorrect packaging details.:

Redesign will be required if this information was used for board layout.  

The following devices are available in the FFVC1517 and are all significantly impacted: XCVU065FFVC1517, XCVU080FFVC1517, XCVU095FFVC1517.

Major issues that would cause the board to fail if not addressed, such as a pin changing to VCCBRAM from VCCAUX, are shown in bold in the table below.  

The other pin changes swap VCCAUX with VCCAUX_IO or VCCINT with VCCINT_IO, which may not impact board designs since the swapped pins typically share the same supply.

The following table lists the pin changes:

Pin

Name - New

Name - Old

R10

VCCBRAM

VCCAUX

R26

VCCINT_IO

VCCBRAM

R28

VCCAUX_IO

VCCINT_IO

R32

VCCAUX

VCCAUX_IO

T9

VCCBRAM

VCCAUX

T25

VCCINT_IO

VCCBRAM

T27

VCCAUX_IO

VCCINT_IO

T31

VCCAUX

VCCAUX_IO

U10

VCCBRAM

VCCAUX

U26

VCCINT_IO

VCCBRAM

U28

VCCAUX_IO

VCCINT_IO

U32

VCCAUX

VCCAUX_IO

V9

VCCBRAM

VCCAUX

V25

VCCINT_IO

VCCINT

V27

VCCAUX_IO

VCCINT_IO

V31

VCCAUX

VCCAUX_IO

W10

VCCINT

VCCAUX

W26

VCCINT_IO

VCCBRAM

W28

VCCAUX_IO

VCCINT_IO

W32

VCCAUX

VCCAUX_IO

AA10

VCCINT

VCCAUX

AA26

VCCINT_IO

VCCBRAM

AA28

VCCAUX_IO

VCCINT_IO

AA32

VCCAUX

VCCAUX_IO

AB9

VCCBRAM

VCCAUX

AB25

VCCINT_IO

VCCINT

AB27

VCCAUX_IO

VCCINT_IO

AB31

VCCAUX

VCCAUX_IO

AC10

VCCBRAM

VCCAUX

AC26

VCCINT_IO

VCCBRAM

AC28

VCCAUX_IO

VCCINT_IO

AC32

VCCAUX

VCCAUX_IO

AD9

VCCBRAM

VCCAUX

AD25

VCCINT_IO

VCCBRAM

AD27

VCCAUX_IO

VCCINT_IO

AD31

VCCAUX

VCCAUX_IO

AE10

VCCBRAM

VCCAUX

AE26

VCCINT_IO

VCCBRAM

AE28

VCCAUX_IO

VCCINT_IO

AE32

VCCAUX

VCCAUX_IO

 

Virtex UltraScale Package Files: Vivado RREF/RCAL Pin Names

Other than for the FFVC1517, Virtex UltraScale pinouts extracted from Vivado 2014.2 are correct except for minor changes in naming convention for MGTRREF/MGTAVTTRCAL pins to change the location suffix from the previous quad number to a letter designation denoting the power supply group. 

All ASCII files already reflect these updates.  

The pinouts in Vivado 2014.3 will be fully updated to match the ASCII files.   

The FFVC1517 ASCII file pinout currently available at www.xilinx.com/support/packagefiles/ultrascale-pkgs.htm have updated and accurate pinout information. 

The C1517 pinout is newly added and correct in the latest Packaging and Pinouts User Guide UG575 v1.1.

AR# 61903
Date Created 09/02/2014
Last Updated 09/09/2014
Status Active
Type Design Advisory
Devices
  • Virtex UltraScale