Status_heartbeat pulse may lag more than the 128 cycles specified in PG036.The PG036 specification on 7series SEM IP status_heartbeat is incorrect.
At the end of an FPGA device scan address, status_heartbeat can be higher than the specified 128 cycles, up to 150 cycles.
As soon as the next set of device scans start from the top of the device it will assert within 128 cycles, so systems that monitor status_heartbeat do not need to alarm unless status_heartbeat is delayed more than 150 cycles.
This change is only applicable for 7 series and does not apply to Spartan-6 or Virtex-6 SEM IP.
PG036 will be updated with the correct number.