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AR# 62294: 2014.3 Vivado - NGC format netlist is not supported for UltraScale designs
2014.3 Vivado - NGC format netlist is not supported for UltraScale designs
I have existing IP cores and synthesized modules in NGC format.
Will I be able to use these files in Vivado for an UltraScale project?
If not, is there a way to convert the NGC file into a format that can be used?
In Vivado 2014.3 and later, there will be no NGC support for UltraScale projects.
For designs with existing NGC files being migrated to an UltraScale architecture, you can do the following:
Migrate the IP core to a current IP or resynthesize the RTL targeting current devices if possible. Most legacy netlists contain constructs that target non-optimal primitives when migrating to later device families.
In Vivado 2014.3 there is a Tcl command (convert_ngc) that will automate the conversion of NGC files to EDIF format.
Note1: 7 Series projects will still allow NGC files to be used. However, Xilinx still recommends converting NGC modules to EDIF or current versions of IP cores.
Note2: 3rd Party Synthesis Vendors will begin to produce Verilog (i.e. 2015.1). After this EDIF support will likely be deprecated.
Note3: IEEE 1735 Encryption does not cover EDIF. Xilinx and all IP partners use 1735 Encryption
Note4: NGC file can be manually converted to edif files using ISE
ngc2edif. The ngc2edif executable is installed with ISE DS and is found under the /Vivado/<version>\ids_lite\ISE\bin\<os> directory if Virtex-7 devices have been installed.
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Vivado Design Suite - 2014.3