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AR# 62472

Vivado Simulation 2014.3 - ERROR: [Common 17-161] Invalid option value '' specified for 'object'.

Description

I am trying to run a Behavioral simulation on a project and receiving the following results:
 
launch_simulation
INFO: [USF-XSim-27] Simulation object is 'sim_1'
INFO: [USF-XSim-37] Inspecting design source files for 'ddr_test' in fileset 'sim_1'...
INFO: [USF-XSim-97] Finding global include files...
INFO: [USF-XSim-103] Finding block fileset files...
INFO: [USF-XSim-67] Inspecting fileset 'fifo_generator_0' for 'FILE_TYPE == "VHDL" || FILE_TYPE == "VHDL 2008"' files...
INFO: [USF-XSim-67] Inspecting fileset 'mig_7series_0' for 'FILE_TYPE == "VHDL" || FILE_TYPE == "VHDL 2008"' files...
INFO: [USF-XSim-68] No files found in 'mig_7series_0'
INFO: [USF-XSim-103] Finding block fileset files...
INFO: [USF-XSim-67] Inspecting fileset 'fifo_generator_0' for 'FILE_TYPE == "Verilog"' files...
INFO: [USF-XSim-67] Inspecting fileset 'mig_7series_0' for 'FILE_TYPE == "Verilog"' files...
INFO: [USF-XSim-98] Fetching design files from 'sim_1'...
ERROR: [Common 17-161] Invalid option value '' specified for 'object'.
    while executing
"get_property "FILE_TYPE" [lindex [get_files -quiet -all $file] 0]"
    ("foreach" body line 3)
    invoked from within
"foreach file $::tclapp::xilinx::xsim::l_compile_order_files {
        if { [usf_is_global_include_file $global_files_str $file] } { continue }
       ..."
    (procedure "usf_get_files_for_compilation_behav_sim" line 38)
    invoked from within
"usf_get_files_for_compilation_behav_sim $global_files_str"
    (procedure "::tclapp::xilinx::xsim::usf_get_files_for_compilation" line 12)
    invoked from within
"::tclapp::xilinx::xsim::usf_get_files_for_compilation global_files_str"
    (procedure "usf_xsim_setup_simulation" line 35)
    invoked from within
"usf_xsim_setup_simulation"
    (procedure "tclapp::xilinx::xsim::setup" line 15)
    invoked from within
"tclapp::xilinx::xsim::setup { -simset sim_1 -mode behavioral -run_dir ..."

Solution

This error occurs on both Windows and Linux systems. 

This issue can occur because of the following:

1) There is a space in the project directory path (for example C:\project\project space\project1)

2) There is a simulation source file that contains a space in the file name (for example project test tb.vhd)

Correcting the path/filename so that there are no spaces allows the simulation to begin.

This issue will be fixed in the 2014.4 release.

AR# 62472
Date Created 10/13/2014
Last Updated 11/24/2014
Status Active
Type Known Issues
Tools
  • Vivado Design Suite - 2014.3