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AR# 62527

UltraScale GTY: how to set the CDR to "lock to local reference clock"

Description

Some popular applications such as oversamplers require that the Clock Data Recovery (CDR) be locked to "local reference clock". 

This means that the Phase Interpolator (PI) is frozen and should not be driven by the CDR.

Another request is that the equalization frequency response be as "flat" or transparent as possible. 

It is not possible to bypass the Continuous Time Linear Equalizer (CTLE), however the following solution provides a preferred CTLE and AGC configuration.

Solution

For GTY transceivers, you can apply the setup below to have the CDR always locked to the local oscillator:

1) CDR configuration

  • RXCDRHOLD = 1b1

  • RXCDROVRDEN = 1b0.

2) LPM, AGC, CTLE configuration

  • RXLPMGCHOLD = does not matter

  • RXLPMGCOVRDEN = 1

  • RXLPM_GC_CFG = 31

  • RXLPMLFHOLD = does not matter

  • RXLPMLFKLOVRDEN = 1

  • RXLPM_LF_CFG = 0

  • RXLPMHFHOLD = does not matter

  • RXLPMHFOVRDEN = 1

  • RXLPM_HF_CFG = 0


AR# 62527
Date Created 10/17/2014
Last Updated 10/24/2014
Status Active
Type General Article
Devices
  • Virtex UltraScale