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AR# 62537

Vivado Constraints - Critical Warning:[Constraints 18-852]Found more than one automatically derived clock matching the supplied criteria for renaming

Description

Vivado gives the following Critical Warning on my "create_generated_clock" constraint.

Critical Warning:[Constraints 18-852]Found more than one automatically derived clock matching the supplied criteria for renaming


How can I resolve it?

Solution

When renaming auto-derived clocks, a single "create_generated_clock" has to specify one and only one auto-derived clock to rename.

Syntax:
create_generated_clock -name new_name [-source source_pin] [-master_clock master_clk] source_object

The optional options -source and -master_clock are used to remove any ambiguity when more than one clock propagates to the pin where you are renaming the auto-derived clock. 

When this Critical Warning is received, run "report_clocks" in the Synthesized or Implemented design.
 
The report_clocks output provides the following information which you can use for the -source and/or -master_clock options to specify a unique auto-derived clock to rename.
 
1. How many generated clocks are on the pin where you are renaming the auto-derived clock?
2. "Master Source" which is for the -source option.
3. "Master Clock" which is for the -master_clock option.

Example:

Constraints that cause the Critical Warning:
create_clock -period 10.000 -name clk1 [get_ports clk]
create_clock -period 5.000 -name clk2 -add [get_ports clk]
create_generated_clock -name user [get_pins my_mmcm/inst/mmcm_adv_inst/CLKOUT1]

"report_clocks" returns the following in the Synthesized design:

Clock                                      Period        Waveform                 Attributes   Sources
clk1                                        10.00000    {0.00000 5.00000}    P                 {clk}
clk2                                        5.00000      {0.00000 2.50000}    P                 {clk}
inst/clk_out1_clk_wiz_0        5.00000      {0.00000 2.50000}    P,G             {my_mmcm/inst/mmcm_adv_inst/CLKOUT0} 
inst/clk_out1_clk_wiz_0_1    2.50000      {0.00000 1.25000}    P,G             {my_mmcm/inst/mmcm_adv_inst/CLKOUT0} 
......                                                                                                                      

====================================================
Generated Clocks
====================================================
Generated Clock   : inst/clk_out1_clk_wiz_0
Master Source     : my_mmcm/inst/mmcm_adv_inst/CLKIN1
Master Clock      : clk1
Multiply By       : 2
Generated Sources : {my_mmcm/inst/mmcm_adv_inst/CLKOUT0}

Generated Clock   : inst/clk_out1_clk_wiz_0_1
Master Source     : my_mmcm/inst/mmcm_adv_inst/CLKIN1
Master Clock      : clk2
Multiply By       : 2
Generated Sources : {my_mmcm/inst/mmcm_adv_inst/CLKOUT0}
......

From the above information we can see that there are two auto-derived clocks on the pin {my_mmcm/inst/mmcm_adv_inst/CLKOUT0} and that they are derived from two different master clocks - clk1 and clk2.

So, modifying the "create_generated_clock" command as in the example below resolves the critical warning:

create_generated_clock -name user -master_clock [get_clocks clk1] [get_pins my_mmcm/inst/mmcm_adv_inst/CLKOUT1]

AR# 62537
Date Created 10/19/2014
Last Updated 10/21/2014
Status Active
Type Known Issues
Tools
  • Vivado Design Suite