We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 62714

2014.3 Partial Reconfiguration - Partial bit file cannot be generated properly if there are nested pblocks in RM


When there are nested pblocks in RM, the write_bitstream command can only generate the full bit file.

The partial bit file cannot be generated.

How can I resolve this issue? 




This issue is fixed in the 2015.1 release of Vivado Design Suite.

To work around this issue, remove the nested pblock in RM before generating the bit file.

Below is an example command to remove the nested pblock:

open_checkpoint <config>_routed.dcp
delete_pblocks {<list of nested pblocks>}
write_bistreams <file>
AR# 62714
Date 08/19/2015
Status Archive
Type General Article
  • Vivado Design Suite - 2014.3
  • Vivado Design Suite - 2014.4
Page Bookmarked