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AR# 62799

2014.3 Vivado Logic Debug - Clock net not shown in the clock list when selecting clock domain for probes in the Set Up Debug wizard


When selecting a clock domain for the probes in the "Set Up Debug" wizard, a clock net that was previously in the clock list is no longer shown.

How can I find this clock net?


As long as the clock net exists in the design, it will be shown in the clock list but might have a different name. 

A net has multiple segment names if it goes across multiple hierarchy boundaries.

In the "Select Clock Domain" window, it only shows the top level segment name for a single clock net by default.

This can be controlled by the option "Display unique nets".

When this option is unchecked, all segment names of a clock net will be shown in the list.

If you cannot find the clock net name in the list, you can try one of the following solutions:
  1. In the Synthesized design, search for this net and check its top level segment name.
    Select this name in the clock list in the "Select Clock Domain" window.
  2. Uncheck the "Display unique nets" option and the other segment net names will be shown.
    The clock net name should now be displayed.
AR# 62799
Date 11/17/2014
Status Active
Type General Article
  • Vivado Design Suite - 2014.3
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