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AR# 62965

OTN IP Master Article - Known Issues and FAQ

Description

This answer record contains known issues for OTN IPs and FAQs regarding the documentation or the features of the IPs.

Solution

General Information

This Answer Record provides a list of the Known Issues and FAQs for OTN IPs.

Supported Devices

 


Known Issues:

(Xilinx Answer 61826) - OTN IP - SAR buffer overflow

(Xilinx Answer 61448) - 2014.2 Vivado IPI - OTN IP simulation error

(Xilinx Answer 62304) - OTN IP - 400G Transponder SLRD XCLI GUI Error

(Xilinx Answer 62605) - OTN IP - PRBS test causes PRBS and buffer overflow/underflow errors

FAQs:

(Xilinx Answer 61582) - OTN IP - How to Install the OTN IP Catalog in Vivado?
 
(Xilinx Answer 62672) - OTN IP - Can our OTN IP support PCIe for processor interface?

(Xilinx Answer 61583) - OTN IP - Byte Ordering between FEC IP and OTL Block

(Xilinx Answer 62950) - OTN IP - What is the data out when far-end loopback is set?

(Xilinx Answer 62926) - OTN IP - Can our OTL4.10 core be used as RX-only?

(Xilinx Answer 61897) - OTN IP - How to make the connection between GTZ and OTL4.4 IP?

(Xilinx Answer 60734) - OTN IP - Mapper API

(Xilinx Answer 62880) - OTN IP - Please clarify OTU4_FS_OUT signal in OTL IP

(Xilinx Answer 60733) - OTN IP - signals clarifications

(Xilinx Answer 60768) - OTN IP - Please clarify the mapper interface to CAUI, lane0 at the high byte or lane9 at the high byte?
 

 

AR# 62965
Date Created 11/27/2014
Last Updated 03/09/2015
Status Active
Type Known Issues
Devices
  • Virtex-7
Tools
  • Vivado Design Suite - 2014.2