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AR# 63229

AXI Memory Mapped to PCI Express (Vivado 2014.4) - v2.5 (Rev. 2) Tactical Patch

Description

Version Found: 2.5 (Rev. 1)
Version Resolved and other known issues: (Xilinx Answer 54646)

If you are using AXI Memory Mapped to PCI Express v2.5 (Rev. 1) in Vivado 2014.4, the patch attached to this Answer Record must be installed to address the following issues:

  • Missing support for xc7a35ti,xc7a50ti, xc7a75ti, xc7a100ti and xc7a200ti
  • Incorrect GT Device instance for xc7z015i device
  • Invalid link width and speeds for -1 speed grade for xc7z030i and xc7z015i devices (x8 is not supported and in the case of xc7z015i, only Gen1 speeds are supported when speed grade -1 is selected)

Solution

The issues listed will be fixed in the next release of the core. 

Please install the patch attached with this answer record, as described below.

  •     This patch is for Vivado 2014.4
  •     Unzip the attached zip file to the directory of your choice.
  •     Open Vivado 2014.4 and create a new project.
  •     Open IP catalog. Right click the core you are using and choose IP Settings.
  •     Click Add Repositories and point it to the location where you have unzipped the patch.
  •     Click OK and you are now ready to generate the core.
  •     If you have previously generated the core, you can choose 'Upgrade IP' on your core.
  •     Alternatively, you can use the MYVIVADO environment variable and point this to the location of the patch.

After the patch is installed, the version of the core should indicate: v2.5 (Rev. 2).

Note: "Version Found" refers to the version the problem was first discovered.

The problem may also exist in earlier versions, but no specific testing has been performed to verify earlier versions.

Revision History:
01/09/2015 - Initial Release

Attachments

Associated Attachments

Name File Size File Type
vivado-patch-AR63229.zip 952 KB ZIP
AR# 63229
Date Created 01/05/2015
Last Updated 01/08/2015
Status Active
Type Known Issues
Tools
  • Vivado Design Suite - 2014.4
IP
  • 7 Series Integrated Block for PCI Express (PCIe)