(UG371) V2.2, page108, describes bit 13 for the attributes TX_CFG0_LANE0..3 as follows:
"Active-High TX lane power down (tx_chpd)"
However, the default setting for this bit is 1'b1.
The default setting for this bit is correct.
The description in the user guide will be changed to:
": Reserved: 1'b1"