2. Support
  3. AR# 6330: VCS - How do I compile Xilinx simulation libraries for VCS? (Verilog)
  4. AR# 63305: SelectIO - Can UltraScale SelectIO support LPDDR4, even though it does not support LVSTL (1.1v)?

AR# 63305

SelectIO - Can UltraScale SelectIO support LPDDR4, even though it does not support LVSTL (1.1v)?

Description

Can UltraScale SelectIO support LPDDR4 interfaces?

Can we interface with LVSTL (1.1v)?

Solution

The UltraScale family does not provide native LPDDR4 support.

However, you can use HSUL I/O standard with VCCO set to 1.1V to interface with LPDDR4 at very low data rates (< 300MHz).

SI simulations with a 2 transmission line (40 Ohms) meet the eye mask specifications.

Vref on the FPGA needs to be set to 0.183V as well.

It is strongly recommended that you perform your own SI analysis by taking into account the specific PCB design details before moving forward with this approach. 

MIG support should not be implied by this article.

AR# 63305
Date 07/14/2015
Status Active
Type General Article
Devices