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AR# 63722

2014.4.1 - Vivado UltraScale Partial Reconfiguration - Floorplan limitation for reconfigurable module containing Global Clock Resource


In 7 series devices, the global clock resource cannot be reconfigured. 
In UltraScale devices, the global clock resource is reconfigurable.
Is there any limitation on the pblock of a reconfigurable module containing a global clock resource?


When you create a pblock for a reconfigurable module with a global clock resource, the pblock should be rectangular and cover the whole clock region.
"Hole in clock region" and L shapes for a pblock are not supported.
From Vivado 2015.1 on, a DRC error message will be reported when this illegal pblock is detected during place_design.
Example message:

ERROR: [DRC 23-20] Rule violation (HDPR-56) Reconfigurable Pblock using Global Clock resources must be simple rectangle shapes and clock region aligned - HD.RECONFIGURABLE Pblock 'pblock_XX' is not a simple rectangle.
A reconfigurable Pblock that ranges Global Clock sources must be a simple contiguous rectangle of clock regions. 
Please re-floorplan to make a simple rectangle using complete clock regions.


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Associated Answer Records

AR# 63722
Date 05/11/2015
Status Active
Type General Article
  • Vivado Design Suite - 2015.1
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