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When simulating a MIG UltraScale DDR3 design using a Micron memory model targeting the sg125 speed grade with CAS Latency = 9 and CAS Write latency = 7, the following error message might be received:
# sim_tb_top.mem_model_x8.memRank.memModel.u_ddr3_x8.main: at time 6947904.0 ps ERROR: CAS Latency = 9 is illegal @tCK(avg) = 1500.220703 # sim_tb_top.mem_model_x8.memRank.memModel.u_ddr3_x8.main: at time 6947904.0 ps ERROR: CAS Latency = 9 is not valid when CAS Write Latency = 7
According to the Micron data sheet for the sg125 speed grade, CAS Latency=9 and CAS Write Latency=7 is supported.
Please contact Micron for a solution and timeline for when this issue will be fixed.