AR# 63857

UltraScale External DONE pull-up recommendation


This article covers the UltraScale External DONE pull-up recommendation.

DONE is a dedicated bidirectional pin referenced to VCCO_0.

A High signal on the DONE pin indicates completion of the configuration sequence.  

By default, the DONE output is open-drain.


Xilinx recommends an external 4.7k Ohm pull-up from the DONE pin to VCCO_0.

When the DONE pin is otherwise not connected, the UltraScale device configuration DONE pin does not require an external pull-up resistor. 

Although the FPGA DONE output is open-drain, the DONE I/O includes an internal pull-up and internal pipeline register to assure reliable configuration startup.

There is no setup or hold requirement for the DONE register.

An external pull-up resistor on the DONE pin of an UltraScale 3D IC should not be stronger than 4.7 k ohms.

Also, the UltraScale FPGA DONE pin external pull-up recommendation is compatible with 7 series FPGAs for a configuration daisy-chain that includes an UltraScale FPGA and a 7 series FPGA with their DONE pins tied together. 

For boards that have an UltraScale FPGA (or 7 series FPGA) and Virtex-6, Spartan-6, or older FPGAs, do not connect the FPGAs in a configuration daisy-chain.  

The Vivado design tools that are required for building daisy-chained configuration files support only the 7 series and newer families. 

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AR# 63857
Date 04/16/2015
Status Active
Type General Article