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AR# 63959

2015.1 Vivado Simulator - No error is issued for illegal array assignment

Description

For the following piece of code:

parameter [7:0] ROM_ARRAY [0:3] = { 8'h12 , 8'h34 , 8'h56, 8'h78 } ;


Vivado Simulator gives no error but the initialization is not as expected.

Questa errors out on the illegal assignment:
 

Illegal assignment to type 'reg[7:0] $[0:3]' from type 'reg[31:0]': Cannot assign a packed type to an unpacked type.

Solution

The usage is not compliant with Verilog LRM.

Vivado Simulator should return an error in this case.

This is scheduled to be fixed in a future release.
AR# 63959
Date Created 03/19/2015
Last Updated 04/30/2015
Status Active
Type Known Issues
Tools
  • Vivado Design Suite - 2015.1