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AR# 6413

3.1i FPGA Editor - When adding probes to Virtex, the banking information is required.

Description

Keywords: Bank, I/O, IO, pin, component, 2.1i

Urgency: Standard

General Description:
When I add a probe to a Virtex design, the I/O banking information is not used, and the particular I/O is left unchecked.

Solution

To work around this, check the correct box for the particular IOB, depending upon the I/O standard that is in that bank.

This will be fixed in a future software release.
AR# 6413
Date Created 05/07/1999
Last Updated 08/15/2002
Status Archive
Type General Article