When I use GTs with CONFIG blocks in the same clock Region for a Reconfigurable Partition (RP), I get the following DRC error:
Is this expected behavior?
The above DRC "HDPR-55" is expected in this situation.
This Pblock cannot be floorplaned to use an entire clock region because Vivado does not support CONFIG blocks inside a Reconfigurable Partition.
However, BUFG_GTs with GTs in RP are required to contain the whole clock region.
As a result, there is a limitation that the user must use a clock region that contains a CONFIG site for an RP that contains GTs.
This limitation is described in (UG909) under the heading "Partial Reconfiguration Checklist for UltraScale Device Designs."